The present invention relates to fabrication techniques of integrated semiconductor devices and in particular to fabrication techniques of poly-emitter bipolar devices.
Bipolar devices with doped polycrystalline silicon (polysilicon) emitters, commonly referred to as poly-emitter bipolar devices, and typically bipolar transistors, are very numerous in many integrated circuits designed for operating at radio frequency because they permit the formation of exceptionally shallow emitter junctions and of self aligned structures with modern fabrication techniques. Moreover, poly-emitter bipolar transistors provide for a higher switching speed and a higher current gain (HFE), in common emitter configuration, substantially without increasing the base resistance, than their counterparts with a more conventional structure.
It has been established that the higher current gain property is tied to the presence of a very thin layer of silicon oxide (one or few mono-layers) at the interface between the monocrystalline silicon of the emitter area of the semiconductor substrate and the polysilicon layer deposited on it. For example, see A. K. Kapoor and D. J. Roulston, xe2x80x9cPolysilicon Emitter Bipolar Transistorsxe2x80x9d, 1989 IEEE Press.
Several physical models have been devised to describe such an interface oxide layer as a tunnel barrier for holes, so justifying the increment of the current gain when the base current decreases. Distribution diagrams of holes in a poly-emitter device are depicted in FIG. 1, while the holes distribution in the polysilicon layer is depicted in FIG. 2.
In the case depicted in FIGS. 1 and 2, both the emitter resistance (RE) as well as the current gain (HFE) depend strongly by the barrier characteristics of the oxide film at the interface. In general RE and HFE are proportional to the expression:   ⅇ      A    ⁢          xe2x80x83        ⁢    δ    ⁢                  B        𝒳            
wherein xcex4 and "khgr" represent respectively the thickness and the highness of the barrier and A and B are constants.
Naturally, for a standard thermal oxide, "khgr" is about 0.6 eV for electrons and 1.1 eV for holes, but, in the case of the oxide that is presumed to be present at the interface between the monocrystalline silicon and the polysilicon upon detecting a certain amount of oxygen, per unit area these values appear to be markedly depressed because of the non-stoichiometric form of such an interface oxide. For this reason, the trade-off between the RE and HFE values depends on the barrier property of the interface film of oxidized silicon though the HFE shows an increasingly marked increase upon an increase of the amount or xe2x80x9cthicknessxe2x80x9d of the interface oxide (or more precisely of the concentration of oxygen atoms per unit area).
The main technical problem in fabricating this kind of integrated structure is represented by the difficulty of controlling the physical-chemical characteristics of the interface, in consideration of the commonly used techniques for depositing the polysilicon that typically are based on a low pressure chemical vapor deposition process (LPCVD). In poly-emitter bipolar devices, the presence at the interface of an amount of oxygen comprised between 1 and 2xc3x971015 oxygen atoms per cm2 of interface area has been instrumentally measured by NRA (Nuclear Reaction Analysis).
The values of oxygen concentration at the interface, measured by the NRA technique, are reported in FIG. 3 together with the measured values of HFE for different devices, in which the interface had been subjected to different process conditions. It can be seen clearly that the values of HFE depend strongly on the amount of oxygen at the interface and that even small differences produce remarkable variations of the current gain. To obtain acceptable HFE values (100xc2x130), the oxygen concentration at the interface must be between 1 and 2xc3x971015 atoms/cm2.
Conventional fabrication processes may contemplate a treatment of the surface of the monocrystalline silicon in the emitter area with a diluted solution of hydrofluoric acid (commonly 1% by weight) before introducing the wafer in the polysilicon LPCVD reactor. Hydrogen passivation of the silicon surface by contacting it with hydrofluoric acid is effective in limiting a spontaneous re-oxidation of the silicon surface exposed to air at room temperature.
Nevertheless, during the loading of the wafer inside the heated chamber of the LPCVD reactor and while evacuating the reactor, the monocrystalline silicon surface oxidizes freely determining a wide dispersion of the values of the current gain of the transistors so fabricated. A typical LPCVD reactor is depicted in FIG. 4. A typical LPCVD process for depositing a layer of polysilicon is illustrated in a general manner in the following table, though conditions of each of the 14 phases may be slightly different, depending on the type of device being integrated and on the fabrication technology.
To limit oxidation of the monocrystalline silicon surface during the loading inside the heated chamber of the reactor and during evacuation of the chamber, a common practice is to maintain the wafer in an atmosphere of inert gas, such as nitrogen (N2), helium or argon during loading and evacuation. By introducing nitrogen (N2) the availability of oxygen or of any other oxidant in the atmosphere inside the reactor may be greatly reduced thus preventing excessive oxidation of the silicon while heating up to the chamber""s temperature. This well known technique for reducing the concentration of oxidant inside the chamber of the LPCVD reactor and eventually of the chamber""s temperature when loading the wafers, tends to produce excessively low gain values of the transistors.
To overcome this drawback, it has been proposed to xe2x80x9cconditionxe2x80x9d the surface of the monocrystalline silicon wafer, before introducing it in the LPCVD reactor for depositing the polysilicon, by chemically oxidizing the silicon surface previously passivated by treatment with hydrofluoric acid, using hydrogen peroxide (H2O2). This technique, even if it ensures the presence of an adequate amount of native oxide at the interface between the monocrystalline silicon and the polysilicon layer, produces an excessive dispersion of the current gain values (HFE).
Moreover, the pre-oxidation treatment with H2O2 requires sophisticated control devices because of the remarkable reactivity of silicon even at low temperature. In fact, even if a residual hydrogen passivation of the surface of the monocrystalline silicon may be still found up to a temperature of about 300xc2x0 C., it has been demonstrated that silicon begins to oxidize well before hydrogen passivation of its surface has completely disappeared.
A thermal oxidation pre-treatment in presence of oxygen and/or steam of the monocrystalline silicon surface to prevent an uncontrolled oxidation during loading, heating and evacuating of the chamber of the LPCVD reactor of polysilicon deposition is not practicable because of the very fast kinetics of the thermal oxidation process that make a precise control, for the extremely small amount of it that is required, almost impossible or at least extremely difficult. Moreover, the presence of an oxidizing atmosphere inside the LPCVD reactor itself would be hardly compatible with the silicon precursor compounds (SiH4) from the point of safety.
There is a need for an improved process in which the amount and uniformity of distribution of a native oxide at the interface between the emitter region of a monocrystalline silicon wafer and the polysilicon layer deposited thereon by a low pressure chemical vapor deposition technique may be effectively controlled.
The process of the present invention substantially eliminates the above mentioned problems of controlling the quantity and uniformity of distribution of bonded oxygen atoms at the interface between the polysilicon and the monocrystalline silicon by carrying out, after having loaded the wafer inside the heated chamber of the reactor and evacuated the chamber of the LPCVD reactor under nitrogen atmosphere, a treatment of the wafer with hydrogen at a temperature generally between 500 and 1200xc2x0 C. and at a vacuum generally between 0.1 Pa and 60000 Pa, and preferably at a temperature of 850xc2x0 C.xc2x115xc2x0 C. and at a vacuum of 11000 Paxc2x12000 Pa, for a time generally between 0.1 and 120 minutes, and most preferably between 0.5 and 1.5 minutes.
This treatment effectively removes substantially any and all the oxygen that may have combined with the silicon on the surface of the monocrystalline silicon during the loading inside the heated chamber of the reactor even if it is done under a nitrogen flux.
After such a hydrogen treatment, another treatment is carried out substantially under the same vacuum conditions and at a temperature generally between 700 and 1000xc2x0 C. with nitrogen protoxide (N2O) for a time generally between 0.1 and 120 minutes, preferably between 0.5 and 1.5 minutes.
It has been found that the treatment with nitrogen protoxide (N2O) at such a vacuum and temperature conditions causes a relatively slow oxidation of the monocrystalline silicon such to allow an effective control of the amount of oxygen at the interface and a great uniformity of distribution of it on the surface. The tunnel barrier characteristics in respect to the holes of the so created oxide film at the interface between the monocrystalline silicon and the polysilicon layer show an outstanding reproducibility.